Ice_fpga

FPGA I/O and control. More...

Functions
void	ice_fpga_init (uint8_t freq_mhz)
	Let the FPGA start and export a clock for it over ICE_FPGA_CLOCK_PIN. More...
bool	ice_fpga_start (void)
	Release the stop mode if it was present, and wait that the FPGA confirms its startup with ICE_FPGA_CDONE_PIN. More...
void	ice_fpga_stop (void)
	Set the ICE_FPGA_CRESET_B_PIN to LOW which keeps the FPGA in reset mode.

Detailed Description

FPGA I/O and control.

Depending on the RTL loaded onto the FPGA, it can use its internal RC oscillator or a more accurate clock signal provided by the RP2040. This library allows to configure this signal, control the FPGA startup, and communicate over SPI to the same pins used for SRAM or FLASH access. An LED pin is used for communicating with the FPGA.

Function Documentation

ice_fpga_init()

void ice_fpga_init

(

uint8_t

freq_mhz

)

Let the FPGA start and export a clock for it over ICE_FPGA_CLOCK_PIN.

Parameters

freq_mhz

Exported clock frequency in MHz. Valid values: 48MHz, 24MHz, 16MHz 12MHz, 8MHz, 6MHz, 4MHz, 3MHz, 2MHz, 1MHz.

The RP2040 exports its own crystal-based clock to the iCE40, through the dedicated CLOCK GPOUT0 feature.

ice_fpga_start()

bool ice_fpga_start

(

void

)

Release the stop mode if it was present, and wait that the FPGA confirms its startup with ICE_FPGA_CDONE_PIN.

Returns

true on success and false if it timeouts.